HighTec supports Andes' RISC-V IP for automotive safety
- HighTec EDV-Systeme GmbH announced support for Andes' RISC-V IP in its C/C++ compiler for the automotive market.
- The HighTec compiler optimizes code generation for safety-critical RISC-V cores, enhancing efficiency and performance.
- This partnership aims to accelerate compliance efforts and improve robustness in RISC-V applications, helping to expedite market readiness.
In Saarbrücken, Germany, on November 28, 2024, HighTec EDV-Systeme GmbH disclosed the integration of Andes' RISC-V IP into its automotive C/C++ compiler suite. This development is significant for automotive software developers, as it ensures optimized code generation specifically for Andes' functionally safe RISC-V cores, which boosts efficiency and performance in automotive applications. The firm is recognized for its commitment to functional safety in the automotive industry and has maintained a leading position in providing ISO 26262 ASIL D certified tools. This announcement builds on the successful launch of Andes' ASIL-B certified RISC-V CPU IP, enhancing the suite of options available for developers working on safety-critical applications. With the growing importance of compliance and performance in automotive software, this partnership between HighTec and Andes Technology is expected to contribute significantly to the advancement of RISC-V-based automotive solutions, which are becoming increasingly relevant in the market. The collaboration aims to streamline compliance for automotive customers, thereby facilitating faster market entry for innovative RISC-V applications, especially in Automated Driving Assistance Systems (ADAS) and In-Vehicle Infotainment (IVI) systems. Overall, this development marks a pivotal moment in the synergy between compiler technology and RISC-V architecture tailored for automotive needs.